Current regulator

ABSTRACT

A current regulator is disclosed which utilizes a well known driver chip. The driver chip has an input signal known as a brake signal &#34;BRK&#34; which typically is used to stop a standard DC motor. In this invention, the brake signal &#34;BRK&#34; is used to create a low resistance current path in order to sustain the current of the current regulator which is used in conjunction with a stepper motor.

BACKGROUND OF THE INVENTION

This invention relates to a current regulator, and more particularly to a current regulator which utilizes a driver chip to create a low resistance current path to sustain the current of a stepper motor.

Referring to FIG. 1, there is shown a prior art current regulator circuit 1O used in conjunction with a stepper motor. In FIG. 1, a voltage supply V_(m) is connected to the collectors c₁ and c₂ of two power transistors T₁ and T₂ respectively. The emitter e₁ of the transistor T₁ is connected to the emitter e₂ of the transistor T₂ through a stepper motor which is shown as an inductance L connected to nodes 12 and 14. The anode of a diode D₁ is connected to node 12 and its cathode is connected to V_(M). The anode of diode D₂ is connected to node 14 and its cathode is connected to V_(M).

In FIG. 1, there are two more transistors T₃ and T₄. The collector c₃ of the transistor T₃ is connected to the emitter e₁ of the transistor T₁, and the collector c₄ of the transistor T₄ is connected to the emitter e₂ of the transistor T₂. The two emitters e₃ and e₄ of the transistors T₃ and T₄ are connected to each other at node 16 and the node 16 is connected to ground G through a resistor R. There are two diodes D₃ and D₄ between the node 16 and the nodes 12 and 14. The cathode of the diode D₃ is connected to node 12 and its anode is connected to node 16 and the cathode of diode D₄ is connected to node 14 and its anode is connected to node 16.

In addition, there are four AND gates A₁, A₂, A₃ and A₄ each of which is connected to a base b₁, b₂, b₃, and b₄ of one of the transistors T₁, T₂, T₃ and T₄ respectively. Each AND gate can activate its respective transistor.

Signal Fwd is connected to the gates A₁ and A₄ and signal Rev is connected to the gates A₂ and A₃. When signal Fwd is "1", it activates the gates A₁ and A₄ which in turn active the transistors T₁ and T₄. When signal Rev is "1", it activates the gates A₂ and A₃ which in turn activate the transistors T₂ and T₃.

With this arrangement, at any given time, either the transistors T₁, and T₄ are activated or the transistors T₂ and T₃ are activated.

In the circuit 10 of FIG. 1, once the voltage V_(M) is turned on, if the signal Fwd is "1", then the transistor T₁, creates a current M which flows through the stepper motor L, the transistor T₄, and resistor R into ground G. The voltage V_(R) from the resistor R at node 16 will be sent to a comparator 18. Comparator 18 will compare this voltage V_(R) to a reference voltage V_(Ref). Once the voltage V_(R) reaches the reference voltage V_(Ref), the comparator 18 sends out a signal 20. Signal 20 from the comparator 18 triggers the one shot timer 22. The one shot timer 22 sends out a limit signal 24 and maintains the limit signal 24 for a given period of time. The signal 24 in activates both gates A₁ and A₂. However, since at any given time either gate A₁ or gate A₂ is active, the signal 24 inactivates the active gate. In this example, since gate A₁ was active, the signal 24 inactivates gate A₁ which in turn inactivates the transistor T₁.

Once the transistor T₁ is inactivated, the current M will start flowing into loop A. Loop A comprises stepper motor L, transistor T₄ and diode D₃. The current M keeps circulating in loop A. However, due to the structure of bipolar transistor T₄ and diode D₃, they waste power. The power waste is due to a voltage drop across the transistor T₄ and diode D₃. The power waste reduces the energy within the inductance L which in turn causes the current in loop A to substantially decrease.

In order to constraint the current from decreasing below a level, after a certain time which is measured by the one shot timer 22, the one shot timer 22 will tun off the limit signal 24. Once the limit signal 24 is turned off, gate A₁ will be activated and the transistor T₁ will be turned on which causes the current M to increase to level l_(Ref) and cause the voltage V_(R) to increase back to level V_(Ref). Once the voltage V_(R) reaches the voltage V_(Ref), signals 20 and 24 will be generated which will turn off the transistor T₁. With this approach the current of the stepper motor can be regulated.

Referring to FIG. 2, there is shown a current M generated through the circuit 10 of FIG. 1. The current during periods t₁, is the current which is generated when the transistors T₁ and T₄ are on. The current during periods t₂, is the current which is circulating within loop A and as can be observed, during period t₂, the current M substantially reduces.

Referring back to FIG. 1, it should be noted that if the Rev signal is on, then transistors T₂ and T₃ will generate a current in the opposite direction of current M and after the transistor T₂ is turned off, the generated current will be circulating in loop B which comprises the stepper motor L, transistor T₃ and diode D₄.

The major problem in this approach is having diodes D₃ and D₄ in conjunction with the bipolar transistors T₃ and T₄. In Loop A diode D₃ and transistor T₄ and in loop B diode D₄ and transistor T₃ waste power and cause the current during period t₂ to substantially decrease. Therefore, this circuit is an inefficient current regulator.

It is an object of this invention to provide an efficient current regulator.

SUMMARY OF THE INVENTION

In accordance with the present invention, there is disclosed a current regulator for a stepper motor which utilizes a driver chip which is well known in the industry. The driver chip used in this invention has an input signal known as brake signal "BRK" which is typically used to stop a standard DC motor. As opposed to the traditional usage of the brake current, in this invention the brake signal BRK is used to create a low resistance current path to sustain the current of the stepper motor.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a prior art current regulator circuit of a stepper motor;

FIG. 2 shows a current generated through the circuit of FIG. 1;

FIG. 3 shows a current regulator circuit of a stepper motor of this invention; and

FIG. 4 shows a current generated through the circuit of FIG. 3.

DETAILED DESCRIPTION OF THE INVENTION

Referring to FIG. 3, there is shown a current regulator circuit 30 of this invention used for a stepper motor. In FIG. 3, the transistors T₁, T₂, T₃, and T₄ of FIG. 1 are replaced by power Metal-Oxide Semiconductor Field-Effect Transistors (MOSFETs) T₁₁, T₁₂, T₁₃ and T₁₄.

In FIG. 3, a stepper motor shown as L1 is connected to two nodes 32 and 34.The drains d₁ and d₂ of transistor T₁₁ and T₁₂ are connected to the power supply V_(DD) and the source S₁ of the transistor T₁₁ is connected to node 32 and the source S₂ of transistor T₁₂ is connected to node 34. The drains d₃ and d₄ of transistor T₁₃ and T₁₄ are connected to the nodes 32 and 34 respectively and the sources S₃ and S₄ of transistors T₁₃ and T₁₄ are connected to node 36 which is connected to ground G through resistor R₁.

The gate g₁ of the transistor T₁₁ is connected to an output pin 38 of a driver chip 40. Pin 38 is a pin which activates or inactivates thetransistor T₁₁. In the same manner, the gate g₂ of the transistorT₁₂ is connected to an output pin 42 of the driver chip 40 and pin 42 activates or deactivates the transistor T₁₂. The gate g₃ of transistor T₁₃ and gate g₄ of the transistor T₁₄ are connected to output pins 46 and 48 respectively and the pins 46 and 48 activate or deactivate the transistors T₁₃ and T₁₄ respectively.

It should be noted that the driver chip 40 is a "configurable H bridge driver chip" (Si9978) by Siliconix which is a well known chip in the industry and typically it is used in conjunction with standard DC motors. It should also be noted that the chip 40 is simplified and only the elements and connections that are essential for this invention are shown.

The driver chip 40 has two AND gates A₁₁ and A₁₂, two OR gates O₁₁ and O₁₂ respectively and two inverters I₁₁ and l₁₂. The output of the and gate A₁₁ is connected to pin 38, the output of the gate A₁₂ is connected to pin 42. The output of the gateO₁₁ is connected to pin 46 and the output of the gate O₁₂ is connected to pin 48. The inverter I₁₁ connects the output of the gateO₁₁ to one of the inputs of the gate A₁₁ and the inverter I₁₂ connects the output of the gate O₁₂ to one of the inputs of the AND gate A₁₂.

In the driver chip 40, an input pin 50 is dedicated to direction signal DIR, an input pin 52 is dedicated to enable signal EN and an input pin 54 is dedicated to a signal known as "brake signal" BRK. Direction signal DIRselects the direction of stepper motor. Direction signal DIR is connected to an AND gate A₁₃ and connected to an AND gate A₁₄ through an inverter I₁₃. The Enable signal EN is connected to both gates A₁₃ and A₁₄. When the Enable signal EN is "1", then if directionsignal DIR is "1", the gate A₁₃ generates a forward signal Fwd₁. Forward signal Fwd₁, which is connected to gates A₁₁ and O₁₂ activates gates A₁₁ and O₁₂ which in turn activate transistors T₁₁ and T₁₄ respectively. When the Enable signal EN is "1", then if direction signal DIR is "O", the gate A₁₄ generates areverse signal Rev₁. Reverse signal Rev₁ which is connected to gates A₁₂ and 0₁₁ activates gates A₁₂ and O₁₁ which inturn activate transistors T₁₂ and T₁₃ respectively.

With the configuration of chip 40, at any given time, only the forward signal Fwd₁ or the reverse signal Rev₁ can be active. Therefore,at any given time only the transistors T₁₁ and T₁₄ or the transistors T₁₂ and T₁₃ can be active.

In the chip 40, the brake signal BRK is connected to both gates O₁₁ and O₁₂. Since the chip 40 is typically used in conjunction with standard DC motors, the common usage of the brake signal BRK is to stop the standard DC motor. In a standard DC motor, since the motor is continuously rotating in one direction, it becomes like a generator that generates electricity and creates inertia. Usually, the brake signal BRK is applied to the circuit of a standard DC motor for several seconds to cause the inertia to dissipate as heat which in turn causes the motor to stop.

On the contrary to the standard usage of the brake signal BRK (stopping a standard DC motor), this invention utilizes the brake signal BRK of the driver chip 40 to facilitate and sustain the flow of current. This conceptwill become more apparent by a description given hereinafter.

In operation, at any given time, either T₁₁ and T₁₄ or T₁₂ and T₁₃ will be activated. If forward signal Fwd₁, is on "1", then T₁₁ and T₁₄ are activated. T₁₁ will generate a currentN which will flow into the stepper motor L₁, transistor T₁₄ and through resistor R₁ into ground G. The current N will generate a voltage V_(R1) across R₁. Node 36 which is connected to the chip 40through an input pin 44 sends the voltage V_(R1) to a comparator 56 of the chip 40. Comparator 56 compares the V_(R1) to a reference voltage V_(Ref1) and when both voltages are at the same level, it generates a signal 58 which is connected to an output pin 60 of the chip 40.

Referring to FIG. 4, there is shown the current N which is generated by thecircuit 30 of this invention. Referring to both FIGS. 3 and 4, during the period t₃, the transistor T₁₁ will be kept on until the current N causes the voltage V_(R1) across resistor R₁ to reach a certain level V_(Ref1). Once the voltage V_(R1) reaches the reference voltage V_(Ref1), the comparator 56 generates a signal 58. In the chip 40, the signal 58 is generated to inactivate transistors T₁₁ and T₁₂ through the gates A₁₁ and A₁₂. For the purpose of simplicity, the connections of signal 58 to the gates A₁₁ and A₁₂ are not shown. However, the signal 58 is also connected to pin 60 to indicate the current limit provided through the pin 44.

It should be noted that the numeral references given to the pins of chip 40are strictly used for the purpose of identifying the pins in the specification of this invention and they do not represent the pin numbers given in the specification of the chip Si9978. However, the signal names "BRK", "DIR", and "En" are actual names used in the specification of the chip Si9978.

In this invention, the signal 58 from pin 60 is connected to a one shot timer 62. The one shot timer 62 is not a part of the chip 40. However, it should be noted that the chip 40 has an internal one shot timer which for the purpose of this invention is disabled.

In this invention, the signal 58 from pin 60 triggers the one shot timer 62to generate a signal. The generated signal from the one shot timer 62 is used as a brake signal BRK which will be sustained by the one shot timer for a given period of time. The brake signal BRK activates the gates O₁₁ and O₁₂ which in turn activate the transistors T₁₃ and T₁₄. While the gates O₁₁ and O₁₂ are activated, the inverters I₁₁ and I₂₂ inactivate the gates A₁₁ and A₁₂. As a result, the transistors T₁₁ and T₁₂ will also be inactivated.

It should be noted that signal 58 also disables the gates A₁₁ and A₁₂. Therefore, at the time that the brake signal BRK of this invention is applied to the chip, both signal 58 and the outputs of inverters I₁₁ will inactivate the gate All and both signal 58 and theoutput of the inverter l₁₂ inactivate the gate A₁₂. There is a redundant inactivation, however, it does not interfere with the function of the circuit 30.

The brake signal BRK will activate both gates O₁₁ and O₁₂ which in turn activate both transistors T₁₃ and T₁₄. By turning on thetransistors T₁₃ and T₁₄, a loop E will be generated which comprises the stepper motor L₁, transistor T₁₄ and transistor T₃. The current N starts circulating within loop E from node 32 through the stepper motor L₁ to node 34 and then through the transistor T₁₄ and transistor T₁₃ back to node 32. During periodt₄, the brake signal BRK will keep both transistors T₁₄ and T₁₃ activated and the current N will keep circulating within loop E. It is essential to create a loop in a stepper motor circuit since sustaining the current of the stepper motor is very crucial.

As opposed to the traditional usage of the brake current in which the brakecurrent is applied to the standard DC motor circuit for few seconds, in this invention, the brake current is applied to the stepper motor circuit only for duration in the range of micro-seconds (μsec). In the preferred embodiment of this invention, the brake current is applied for 40 μsec (t₄). However, for stepper motors with different inductance, different duration in the range of micro-seconds will be selected. Therefore, at the end of period t₄, the one shot timer 62 disables the brake signal BRK.

If the brake signal BRK was not used to create a loop E, a diode between the nodes 32 and 36 was needed to create a loop in which the current of the stepper motor could circulate. As it was previously mentioned, a diodein conjunction with a bipolar transistor cause the current to substantiallydecrease. In this invention, the brake signal BRK is used in an opposite manner for which it was intended to create a low resistance loop, through transistor T₁₃, in which the stepper motor current can circulate.

Since the model of each power MOSFET includes a diode, by using power MOSFETs T₁₁, T₁₂, T₁₃, and T₁₄, the diodes D₁, D₂, D₃, and D₄ of the circuit 10 of FIG. 1 are eliminated. It should be noted that the diodes within the transistors T₁₁, T₁₂, T₁₃, and T₁₄ are not as large as the diodes D₁₁, D₂, D₃ and D₄. However, they can function in the same manner. In the circuit 30 of this invention, since the bipolar transistorsT₃ and T₄ and the diodes D₃ and D₄ are eliminated, the power waste is reduced. Due to the structure of MOSFETs, transistors T₁₃ and T₁₄ waste less power and have lower impedance than bipolar transistors T₃ and T₄ and waste much less power than thecombination of the transistors T₃ and diode D₄ or transistor T₄ and diode D₃. Therefore, the power waste in the circuit 30 ofthis invention is substantially less than the power waste of the conventional circuit 10. As a result, the circuit 30 of this invention provides a low resistance current path. In circuit 30, the current N within loop E decreases with a lesser magnitude in comparison to the current M of the conventional circuit 10 of FIG. 1. This in turn improves the efficiency of the current regulator of this invention.

At the end of period t₄, once the brake signal BRK is disabled, transistor T₁₁ will be turned on within the period of t₃ and thecurrent N will increase to a level which causes the voltage V_(R1) to reach V_(Ref1) which in turn causes the brake signal BRK to be generated. The process of turning on the transistors T₁ and T₁₄ during t₃ and turning on the transistors T₁₃ and T₁₄ duringt₄ will be repeated for regulating the current of the stepper motor.

It should be noted that if transistors T₁₂ and T₁₃ are activated,the circuit 30 functions in the same manner as if transistors T₁₁ and T₁₄ were activated with the exception of the direction of current. When transistor T₁₂ and T₁₃ are activated, the direction of the current in the stepper motor and in the loop E will be the opposite of thedirection of the current when the transistors T₁₁ and T₁₄ were activated. Therefore, in this invention, transistors T₁₃ and T₁₄are used in a bi-directional manner.

It should also be noted that if one desires, a comparator outside of the chip can be used instead of the comparator 56 of the chip 40 to generate signal 58 which is connected to the one shot timer 62.

It should further be noted that the current regulator of this invention is not limited to the stepper motor applications and it can be utilized for different applications. For other applications, the stepper motor shown byL₁ in FIG. 3 will be replaced by a circuit which requires a current regulator such as the current regulator of this invention.

In addition, it should be noted that numerous changes in details of construction and the combination and arrangement of elements may be resorted to without departing from the true spirit and scope of the invention as hereinafter claimed. 

We claim:
 1. A current regulator comprising:a first MOSFET transistor having a drain, a gate and a source; a second MOSFET transistor having a drain, a gate and a source; a third MOSFET transistor having a drain, a gate and a source; a fourth MOSFET transistor having a drain, a gate and a source; a power supply; said drain of said first transistor and said drain of said second transistor being electrically connected to said power supply; a first node; a second node; said source of said first transistor and said drain of said third transistor being electrically connected to said first node; said source of said second transistor and said drain of said fourth transistor being electrically connected to said second node; a load being electrically connected to said first node and said second node to provide an electrical path between said first node and said second node; a third node said source of said third transistor and said source of said fourth transistor being electrically connected to said third node; a ground; a resistor having a first terminal and a second terminal; said third node being electrically connected to said first terminal of said resistor and said ground being electrically connected to said second terminal of said resistor; a driver chip; said gate of said first transistor, said gate of said second transistor, said gate of said third transistor, and said gate of said fourth transistor all being operably connected to said driver chip; said driver chip having a brake input signal; means for generating said brake signal; selecting means; said driver chip and said selecting means being so constructed and arranged that when said brake signal is not generated said selecting means selectively activates said first transistor and said fourth transistor or said second transistor and said third transistor and when said brake signal is generated said third transistor and said fourth transistor are active whereby a low resistance current path is created when said brake signal is generated.
 2. The current regulator recited in claim 1, wherein said load is a stepper motor.
 3. The current regulator recited in claim 1, wherein said brake signal generating means comprises a comparator and a one shot timer.
 4. The current regulator recited in claim 3, wherein said comparator is within said driver chip.
 5. The current regulator recited in claim 3, wherein said comparator is outside of said driver chip.
 6. The current regulator recited in claim 3, wherein said load is a stepper motor. 